Integrated circuit devices often receive single-ended clock signals, i.e., signals that vary between a low voltage and a high voltage and are referenced to a fixed reference voltage, typically either the low voltage or the high voltage. Such circuit devices then respond to whether the single-ended signal is above, below or equal to the reference voltage. However, for proper operation some circuits require differential input signals at a pair of terminals, i.e., signals that vary in opposed fashion. Such circuits then respond to whether the first terminal is at a higher voltage than the second, or vice versa.
For example, delay stages in many delay-locked loops require high-speed, low-skew differential inputs for proper operation. Additionally, phase comparators in such delay-locked loops may also utilize differential input signals. Because integrated circuit devices that include such delay-locked loops often receive only single-ended signals, the single-ended signals often must be converted to differential signals.
One approach to converting a single-ended signal into a differential signal is shown in FIG. 1 where a single-ended signal CK is input to an inverter 40 to produce an inverted signal CK*. The noninverted and inverted signals CK, CK* are then output at a pair of terminals 42, 44 as a differential signal.
One problem with the above-described approach is that the output of the inverter 40 (i e., the inverted signal CK*) is delayed relative to the input to the inverter 40 (the noninverted signal CK) by the response time of the inverter 40. As a consequence, the differential signals CK, CK* are "skewed," as shown in FIG. 2. One consequence of skew is that the signals CK, CK* do not cross the midpoint V.sub.MID at the same times. Instead, the midpoint crossings are offset by a skew time T.sub.d, which is typically on the order of 50 picoseconds or more, even with a very fast inverter 40. Such skew times are unacceptable for some applications, such as very low jitter delay-locked loops and phase-locked loops. In such circuits, skewed input signals can cause instability, drift and jitter in the output signals. Consequently, it is desirable to produce differential signals from single-ended signals with lowered skew times.